These chips, built on the Armv9.2 architecture, promise higher performance and improved power efficiency. Arm introduced a new 'QARMA3 algorithm' for memory security and showcased a potential 14-core mega-chip design for high-performance laptops.
Arm claims the big Cortex X3 chip will have 15 percent higher performance than this year's X3 chip, and "40 percent better power efficiency."
The company also promises a 20 percent efficiency boost for the A700 series and a 22 percent efficiency boost for the A500.
The new chips are built on the new 'Armv9.2' architecture, which adds a "new QARMA3 algorithm" for Arm's Pointer Authentication memory security feature. Pointer authentication assigns a cryptographic signature to memory pointers and is meant to shut down memory corruption vulnerabilities like buffer overflows by making it harder for unauthenticated programs to create valid memory pointers. This feature has been around for a while, but Arm's new algorithm reduces the CPU overhead of all this extra memory work to just a per cent of the chip's power.
Arm's SoC recommendations are usually a "1+3+4" design. That's one big X chip, three medium A700 chips, and four A500 chips, however this year the outfit is trying something a little different. It has swapped two small chips for two medium chips, which would give you at a "1+5+2" configuration. If you run that on Android 13 Arm thinks this will give you 27 percent more performance. Arm's blog post also mentions a 1+4+4 chip -- nine cores -- for a flagship smartphone.
This year Arm has included a wild design for a giant mega-chip that is unlikely to see the light of day. It did this last year too with a design with eight Cortex X3 chips and four A715 cores, which the company claimed would rival an Intel Core i7. This year's mega chip is a 14-core monster with 10 Cortex X4 chips and four A720 chips, which Arm says is meant for "high-performance laptops." Arm calls the design the company's "most powerful cluster ever built" although we don't know if anyone will build it.
