According to a leak, the Zen 6 chips will have two IMCs, though it’s unclear if this means dual controllers on a single die or two discrete units. Either way, at least one controller will be limited to 1 DIMM per Channel (1DPC), meaning users can only populate two slots in certain configurations.

Current AM5 boards boot from DIMM slots A0 and B0, but with Medusa, the new preference reportedly shifts to A1 and B1. That shift could cause a headache for owners of two-DIMM motherboards like Mini-ITX or mATX variants, which were built with the existing slot layout in mind. On many four-DIMM boards, A2 and B2 are often marked as primaries — creating even more potential for confusion.

MSI’s MPOWER AM5 board plays nice with the A1/B1 layout, which may put it ahead of the curve when Medusa finally lands.

AMD allegedly is working to re-enable A0/B0 support for Zen 6, though performance is rumoured to take a hit in that setup. Enthusiasts on existing AM5 platforms might need a firmware update or a new motherboard to take advantage of Medusa’s revamped memory engine.

The Zen 6 architecture promises boosts in core count and cache and will likely launch sometime next year. This all comes while AMD preps its HPC-grade Zen 6 EPYC “Venice” chips, which will be fabbed on TSMC’s bleeding-edge 2nm N2 node in Arizona.