Published in
News
Friday, 25 April 2025 11:15
TSMC unveils 9.5-reticle CoWoS packaging
Chip packaging just got absurdly massive
TSMC is pimping up its CoWoS (Chip-on-Wafer-on-Substrate) tech so that can cram an obscene amount of silicon into a single unit.
Published in
PC Hardware
Thursday, 12 March 2015 11:52
Wearables will bring substrate problems
SiP packaging is the next big thing, or not
Analysts at iConnect are warning that while the IC substrate market in 2015 should be happy at the rise of wearables, there are some problems in the industry.